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mc145026, mc145027 mc145028 ordering information device package mc145026p plastic dip mc145026d sog package mc145027p plastic dip MC145027DW sog package mc145028p plastic dip mc145028dw sog package freescale semiconductor technical data mc145026/d rev. 4, 1/2005 freescale semiconductor 3-56 wireless rf product device data mc145026 d suffix sog package case751b p suffix plastic dip case 648 dw suffix sog package case 751g 16 1 16 1 16 1 1 introduction these devices are desi gned to be used as encoder/decoder pairs in re mote control applications. the mc145026 encodes nine lin es of information and serially sends this informati on upon receipt of a transmit enable (te ) signal. the nine line s may be encoded with trinary data (low, high, or ope n) or binary data (low or high). the words are transm itted twice per encoding sequence to increase security. the mc145027 decoder receives the serial stream and interprets five of the trinar y digits as an address code. thus, 243 addresses are possible. if binary data is used at the encoder, 32 addresses ar e possible. the remaining serial information is interpre ted as four bits of binary data. the valid transmissi on (vt) output goes high on the mc145027 when two conditions are met. first, two addresses must be consecutively received (in one encoding sequence) which both match the local address. second, the 4 bits of data must match the last valid data received. the active vt indica tes that the information at the data output pins has been updated. mc145026, mc145027, mc145028 encoder and decoder pairs cmos contents 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . 3-56 2 electrical specifications . . . . . . . . . . . . . . 3-59 3 operating characteristics . . . . . . . . . . . . . 3-63 4 pin descriptions . . . . . . . . . . . . . . . . . . . . . 3-64 5 mc145027 and mc145028 timing . . . . . . . 3-71 6 package dimensions . . . . . . . . . . . . . . . . . 3-73 freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
introduction freescale semiconductor wireless rf product device data 3-57 mc145026 the mc145028 decoder treats al l nine trinary digits as an addre ss which allows 19,683 codes. if binary data is encoded, 512 codes are po ssible. the vt output goes high on the mc145028 when two addresses are consecutively received (in one encoding se quence) which both match the local address. ? operating temperature range: - 40 to + 85 c ? very-low standby current for th e encoder: 300 na maximum @ 25 c ? interfaces with rf, ultrasonic, or infrared modulators and demodulators ? rc oscillator, no crystal required ? high external component tolerance; can use 5% components ? internal power-on reset forces all decoder outputs low ? operating voltage range: mc145026 = 2.5 to 18 v mc145027, mc145028 = 4.5 to 18 v figure 1. pin assignments mc145026 encoder mc145027 decoders mc145028 decoders a1 a2 a3 a4 a5 a6/d6 a7/d7 v ss v dd d out te r tc c tc r s a9/d9 a8/d8 a1 a2 a3 a4 a5 r 1 c 1 v ss v dd d6 d7 d8 d9 vt r 2 /c 2 d in a1 a2 a3 a4 a5 r 1 c 1 v ss v dd a6 a7 a8 a9 vt r 2 /c 2 d in
freescale semiconductor 3-58 wireless rf product device data mc145026 introduction figure 2. mc145026 encoder block diagram figure 3. mc145027 decoder block diagram r s r tc te c tc 3-pin oscillator and enable 4 data select and buffer d out ring counter and 1-of-9 decoder trinary detector v dd = pin 16 v ss = pin 8 a1 a2 a3 a4 a5 a6/d6 a7/d7 a8/d8 a9/d9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 11 9 10 14 12 13 15 divider control logic sequencer circuit latch 4-bit shift register data extractor a1 1 a2 a3 a4 a5 2 3 4 5 1 2 3 4 5 d6 d7 d8 d9 vt 11 12 14 13 15 9 d in v dd = pin 16 v ss = pin 8 76 10 c 1 c 2 r 1 r 2
electrical specifications freescale semiconductor wireless rf product device data 3-59 mc145026 figure 4. mc145028 decoder block diagram 2 electrical specifications this device contains protection circuitry to guard agai nst damage due to high stat ic voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impeda nce circuit. for proper operation, v in and v out should be constrained to the range vss (v in or v out ) vdd. table 1. maximum ratings* (voltages referenced to v ss ) ratings symbol value unit dc supply voltage v dd - 0.5 to + 18 v dc input voltage v in - 0.5 to v dd + 0.5 v dc output voltage v out - 0.5 to v dd + 0.5 v dc input current, per pin i in 10 ma dc output current, per pin i out 10 ma power dissipation, per package p d 500 mw storage temperature t stg - 65 to + 150 c lead temperature, 1 mm from case for 10 seconds t l 260 c * maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the limits in the electrical characteristics tabl es or pin descriptions section. sequencer circuit control logic 9-bit shift register data extractor a1 a2 a3 a4 a5 1 2 3 4 5 v dd = pin 16 v ss = pin 8 a6 a8 a7 a9 15 12 14 13 1 2 3 4 5 6 7 8 9 11 vt 9 d in 76 10 c 1 c 2 r 1 r 2
freescale semiconductor 3-60 wireless rf product device data mc145026 electrical specifications table 2. electrical characteristics - mc145026 1 , mc145027, and mc145028 (voltage referenced to v ss ) symbol characteristic v dd v guaranteed limit unit - 40 c25 c85 c min max min max min max v ol low-level output voltage (v in = v dd or 0) 5.0 10 15 - - - 0.05 0.05 0.05 - - - 0.05 0.05 0.05 - - - 0.05 0.05 0.05 v v oh high-level output voltage (v in = 0 or v dd )5.0 10 15 4.95 9.95 14.95 - - - 4.95 9.95 14.95 - - - 4.95 9.95 14.95 - - - v v il low-level input voltage (v out = 4.5 or 0.5 v) (v out = 9.0 or 1.0 v) (v out = 13.5 or 1.5 v) 5.0 10 15 - - - 1.5 3.0 4.0 - - - 1.5 3.0 4.0 - - - 1.5 3.0 4.0 v v ih high-level input voltage (v out = 0.5 or 4.5 v) (v out = 1.0 or 9.0 v) (v out = 1.5 or 13.5 v) 5.0 10 15 3.5 7.0 11 - - - 3.5 7.0 11 - - - 3.5 7.0 11 - - - v i oh high-level output current (v out = 2.5 v) (v out = 4.6 v) (v out = 9.5 v) (v out = 13.5 v) 5.0 5.0 10 15 - 2.5 - 0.52 - 1.3 - 3.6 - - - - - 2.1 - 0.44 - 1.1 - 3.0 - - - - - 1.7 - 0.36 - 0.9 - 2.4 - - - - ma i ol low-level output current (v out = 0.4 v) (v out = 0.5 v) (v out = 1.5 v) 5.0 10 15 0.52 1.3 3.6 - - - 0.44 1.1 3.0 - - - 0.36 0.9 2.4 - - - ma i in input current - te (mc145026, pull-up device) 5.0 10 15 - - - - - - 3.0 16 35 11 60 120 - - - - - - a i in input current r s (mc145026), d in (mc145027, mc145028) 15 - 0.3 - 0.3 - 1.0 a i in input current a1 - a5, a6/d6 - a9/d9 (mc145026), a1 - a5 (mc145027), a1 - a9 (mc145028) 5.0 10 15 - - - - - - - - - 110 500 1000 - - - - - - a c in input capacitance (v in = 0) - - - - 7.5 - - pf i dd quiescent current - mc145026 5.0 10 15 - - - - - - - - - 0.1 0.2 0.3 - - - - - - a i dd quiescent current - mc145027, mc145028 5.0 10 15 - - - - - - - - - 50 100 150 - - - - - - a 1 also see next electrical characteri stics table for 2.5 v specifications.
electrical specifications freescale semiconductor wireless rf product device data 3-61 mc145026 i dd dynamic supply current - mc145026 (f c = 20 khz) 5.0 10 15 - - - - - - - - - 200 400 600 - - - - - - a i dd dynamic supply current - mc145027, mc145028 (f c = 20 khz) 5.0 10 15 - - - - - - - - - 400 800 1200 - - - - - - a 1 also see next electrical characteri stics table for 2.5 v specifications. table 3. electrical characteristics - mc145026 (voltage referenced to v ss ) symbol characteristic v dd v guaranteed limit unit - 40 c25 c85 c min max min max min max v ol low-level output voltage (v in = 0 v or v dd ) 2.5 - 0.05 - 0.05 - 0.05 v v oh high-level output voltage (v in = 0 v or v dd ) 2.5 2.45 - 2.45 - 2.45 - v v il low-level input voltage (v out = 0.5 v or 2.0 v) 2.5 - 0.3 - 0.3 - 0.3 v v ih high-level input voltage (v out = 0.5 v or 2.0 v) 2.5 2.2 - 2.2 - 2.2 - v i oh high-level output current (v out = 1.25 v) 2.5 0.28 - 0.25 - 0.2 - ma i ol low-level output current (v out = 0.4 v) 2.5 0.22 - 0.2 - 0.16 - ma i in input current (te - pull-up device) 2.5 - - 0.09 1.8 - - a i in input current (a1-a5, a6/d6-a9/d9) 2.5 - - - 25 - - a i dd quiescent current 2.5 - - - 0.05 - - a i dd dynamic supply current (f c = 20 khz) 2.5 - - - 40 - - a table 2. electrical characteristics - mc145026 1 , mc145027, and mc145028 (continued) (voltage referenced to v ss ) symbol characteristic v dd v guaranteed limit unit - 40 c25 c85 c min max min max min max
freescale semiconductor 3-62 wireless rf product device data mc145026 electrical specifications table 4. switching characteristics - mc145026 1 , mc145027, and mc145028 (c l = 50 pf, t a = 25 c) 1 also see next electrical characteri stics table for 2.5 v specifications. symbol characteristic figure no. v dd guaranteed limit unit min max t tlh , t thl output transition time 5 , 9 5.0 10 15 - - - 200 100 80 ns t r d in rise time - decoders 6 5.0 10 15 - - - 15 15 15 s t f d in fall time - decoders 6 5.0 10 15 - - - 15 5.0 4.0 s f osc encoder clock frequency 7 5.0 10 15 0.001 0.001 0.001 2.0 5.0 10 mhz f decoder frequency - referenced to encoder clock 13 5.0 10 15 1.0 1.0 1.0 240 410 450 khz t w te pulse width - encoders 8 5.0 10 15 65 30 20 - - - ns table 5. switching characteristics - mc145026 (c l = 50 pf, t a = 25 c) symbol characteristic figure no. v dd guaranteed limit unit min max t tlh , t thl output transition time 5 , 9 2.5 - 450 ns f osc encoder clock frequency 7 2.5 1.0 250 khz t w te pulse width 8 2.5 1.5 - s
operating characteristics freescale semiconductor wireless rf product device data 3-63 mc145026 3 operating characteristics 3.1 mc145026 the encoder serially transmits trinar y data as defined by the state of th e a1 - a5 and a6 /d6 - a9/d9 input pins. these pins may be in either of three states (low , high, or open) allowing 19,683 possible codes. the transmit sequence is initiated by a low level on the te input pin. upon power-up, the mc145026 can continuously transm it as long as te remains low (also, the device can transmit two-word sequences by pulsing te low). however, no mc145026 appli cation should be designed to rely upon the first data word transmitted immediately after power- up because this word may be inva lid. between the two data words, no signal is sent for th ree data periods (see 11 ). each transmitted trinary digit is encoded into pulses (see 12 ). a logic 0 (low) is encoded as two consecutive short pulses, a logic 1 (high) as two consecutive long pulses, and an open (high impedance) as a long pulse followed by a short pulse. the input state is determined by using a weak ?output? device to try to force each input high then low. if only a high state results from the two tests, the input is assumed to be hardwired to v dd . if only a low state is obtained, the input is assume d to be hardwired to v ss . if both a high and a low can be forced at an input, an open is assumed and is encoded as such. the ?high? and figure 5. output transition time figure 6. d in rise and fall time figure 7. encoder clock frequency figure 8. te pulse width figure 9. test circuit any output 10% 90% t tlh t thl t f t f d in 10% 90% v dd v ss t/f osc r tc 50% t w v dd v ss 50% te device under test output test point c l * * includes all probe and fixture capacitance.
freescale semiconductor 3-64 wireless rf product device data mc145026 pin descriptions ?low? levels are 70% and 30% of the supply voltage as shown in the electrical charac teristics table. the weak ?output? device sinks/sources up to 110 a at a 5 v supply level, 500 a at 10 v, and 1 ma at 15 v. the te input has an internal pull-up devi ce so that a simple switch may be used to force the input low. while te is high, the encoder is completely disabled, the oscillator is inhibited, and the current drain is reduced to quiescent current. when te is brought low, the oscillator is started and the transmit sequence begins. the inputs are then sequentiall y selected, and determinat ions are made as to the input logic states. this information is serially transmitted via the d out pin. 3.2 mc145027 this decoder receives the serial data from the encode r and outputs the data, if it is valid. the transmitted data, consisting of two identical word s, is examined bit by bit during rece ption. the first five trinary digits are assumed to be the addres s. if the received address matches the lo cal address, the next four (data) bits are internally stored, but are not transferred to the output data latch. as the second encoded word is received, the address must again match. if a match o ccurs, the new data bits are checked against the previously stored data bits. if the two nibbles of data (four bits each) match, the data is transferred to the output data latch by vt and remains unt il new data replaces it. at the same time, the vt output pin is brought high and remains high until an er ror is received or until no input si gnal is received for four data periods (see 11 ). although the address information may be encoded in trinar y, the data information must be either a 1 or 0. a trinary (open) data line is decoded as a logic 1. 3.3 mc145028 this decoder operates in the same manner as the mc 145027 except that nine addr ess lines are used and no data output is available. the vt output is used to indicate that a valid address has been received. for transmission security, two identical transmitted words must be consecut ively received before a vt output signal is issued. the mc145028 allows 19,683 addresses when trinary leve ls are used. 512 addresses are possible when binary levels are used. 4 pin descriptions 4.1 mc145026 encoder a1 - a5, a6/d6 - a9/d9 address, address/data inputs (pins 1 - 7, 9, and 10) these address/data inputs are encoded and the data is sent serially from the encoder via the d out pin. r s , c tc , r tc (pins 11, 12, and 13) these pins are part of the oscill ator section of the encoder (see 10 ).
pin descriptions freescale semiconductor wireless rf product device data 3-65 mc145026 if an external signal source is used instead of the internal oscillator, it should be connected to the r s input and the r tc and c tc pins should be left open. te transmit enable (pin 14) this active-low transmit enable input initiates trans mission when forced low. an internal pull-up device keeps this input normally high. the pul l-up current is specified in the electrical charac teristics table. d out data out (pin 15) this is the output of the encoder that se rially presents the encoded data word. v ss negative power supply (pin 8) the most-negative supply potentia l. this pin is usually ground. v dd positive power supply (pin 16) the most-positive power supply pin. 4.2 mc145027 and mc145028 decoders a1 - a5, a1 - a9 address inputs (pi ns 1 - 5)-mc145027, address inputs (pins 1 - 5, 15, 14, 13, 12)-mc145028 these are the local address inputs. th e states of these pins must matc h the appropriate encoder inputs for the vt pin to go high. the local address may be encoded with trinary or binary data. d6 - d9 data outputs (pins 15, 14, 13, 12)-mc145027 only these outputs present the binary in formation that is on encoder input s a6/d6 through a9/d9. only binary data is acknowledged; a trinary open at the mc 145026 encoder is decoded as a high level (logic 1). d in data in (pin 9) this pin is the serial data input to the decoder. the input voltage must be at cm os logic levels. the signal source driving this pin must be dc coupled.
freescale semiconductor 3-66 wireless rf product device data mc145026 pin descriptions r 1 , c 1 resistor 1, capaci tor 1 (pins 6, 7) as shown in 3 and 4 , these pins accept a resistor and capacitor that are used to determine whether a narrow pulse or wide pulse has been received. the time constant r 1 c 1 should be set to 1.72 encoder clock periods: r 1 c 1 = 3.95 r tc c tc r 2 /c 2 resistor 2/capacitor 2 (pin 10) as shown in 3 and 4 , this pin accepts a resistor and capacitor that are used to detect both the end of a received word and the end of a transmission. the time constant r 2 x c 2 should be 33.5 encoder clock periods (four data periods per 12 ): r 2 c 2 = 77 r tc c tc . this time constant is used to determine whether the d in pin has remained low for four data periods (end of transmission). a separate on-chip comparator looks at the voltage -equivalent two data periods (0.4 r 2 c 2 ) to detect the dead time between received words within a transmission. vt valid transmission output (pin 11) this valid transmission output goes high after th e second word of an encoding sequence when the following conditions are satisfied: 1. the received addresses of both words match the local decoder address, and 2. the received data bits of both words match. vt remains high until either a mism atch is received or no input signal is received for four data periods. v ss negative power supply (pin 8) the most-negative supply potentia l. this pin is usually ground. v dd positive power supply (pin 16) the most-positive power supply pin.
pin descriptions freescale semiconductor wireless rf product device data 3-67 mc145026 figure 10. encoder oscillator information figure 11. timing diagram this oscillator operates at a frequency determined by the external rc network; i.e., f 1 2.3 r tc c tc (hz) for 1 khz f 400 khz where: c tc = c tc + c layout + 12 pf r s 2 r tc r s 20 k r tc 10 k 400 pf < c tc < 15 f the value for r s should be chosen to be 2 times r tc . this range ensures that current through r s is insignificant compared to current through r tc . the upper limit for r s must ensure that r s x 5 pf (input capacitance) is small compared to r tc x c tc . for frequencies outside the indicated range, the formula is less accurate. the minimum recommended oscillation frequency of this circuit is 1 khz. susceptibility to externally induced noise signals ma y occur for frequencies below 1 khz and/or when resistors utilized are greater than 1 m ? . 13 12 11 r s c tc internal enable r tc 2 4 6 16 18 20 22 24 26 28 30 80 82 84 86 88 90 114 116 118 120 122 178 180 182 184 pw min te encoder encoder oscillator (pin 12) 1st digit 9th digit 1st digit 9th digit 2 word transmission continuous transmission high low open 1st word d out (pin 15) encoding sequence 2nd word decoder vt (pin 11) data outputs 1.1 (r 2 c 2 )
freescale semiconductor 3-68 wireless rf product device data mc145026 pin descriptions figure 12. encoder data waveforms figure 13. f max vs c layout - decoders only encoder oscillator (pin 12) encoded ?one? encoded ?zero? encoded ?open? d out (pin 15) data period 500 400 300 200 100 f max (khz) (ref. to encoder clock) 10 20 30 40 50 c layout (pf) on pins 1 - 5 (mc145027); pins 1 - 5 and 12 - 15 (mc145028) v dd = 15 v v dd = 10 v v dd = 5 v
pin descriptions freescale semiconductor wireless rf product device data 3-69 mc145026 figure 14. mc145027 flowchart no yes has the transmission begun? does the 5-bit address match disable vt the address pins? on the 1st address mismatch no yes disable vt on the 1st data mismatch store the 4-bit data does this data match the stored previously data? no yes is this at l e a s t t h e 2nd consecutive match since vt disable? yes no latch data onto output pins and activate vt have 4-bit times passed? yes no no yes disable vt has a new transmission begun?
freescale semiconductor 3-70 wireless rf product device data mc145026 pin descriptions figure 15. mc145028 flowchart has the yes no transmission begun? does the address match the address pins? disable vt on the 1st address mismatch and ignore the rest of this word no yes no yes is this at least the 2nd consecutive match since vt disable? activate vt yes no no disable vt have 4-bit times passed? has a new transmission begun? yes
mc145027 and mc145028 timing freescale semiconductor wireless rf product device data 3-71 mc145026 5 mc145027 and mc145028 timing to verify the mc145027 or mc145028 timing, check the wave forms on c1 (pin 7) and r2/c2 (pin 10) as compared to the incoming data waveform on d in (pin 9). the r-c decay seen on c1 discharges down to 1/3 v dd before being reset to v dd . this point of reset (labelled ?dos? in 16 ) is the point in time where the decisi on is made whether the data seen on d in is a 1 or 0. dos should not be too close to the d in data edges or intermitt ent operation may occur. the other timing to be checked on the mc145027 and mc145028 is on r2/c2 (see 17 ). the r-c decay is continually reset to v dd as data is being transmitted. only between words and after the end-of-transmission (eot) does r2 /c2 decay significantly from v dd . r2/c2 can be used to identify the internal end-of-word (eow) ti ming edge which is generated when r2/c2 decays to 2/3 v dd . the internal eot timing edge occurs when r2/c2 decays to 1/3 v dd . when the waveform is being observed, the r-c decay should go down between the 2/3 and 1/3 v dd levels, but not too close to either level before data transmission on d in resumes. verification of the timing descri bed above should ensure a good matc h between the mc145026 transmitter and the mc145027 and mc145028 receivers. figure 16. r-c decay on pin 7 (c1) figure 17. r-c decay on pin 10 (r2/c2) v dd dos dos c1 0 v d in v dd 2/3 1/3 0 v r2/c2 2/3 1/3 0 v v dd eow eot
freescale semiconductor 3-72 wireless rf product device data mc145026 mc145027 and mc145028 timing figure 18. typical application c tc = c tc + c layout + 12 pf 100 pf c tc 15 f r tc 10 k ? ; r s 2 r tc r 1 10 k ? c 1 400 pf r 2 100 k ? c 2 700 pf f osc = 1 2.3 r tc c tc r 1 c 1 = 3.95 r tc c tc r 2 c 2 = 77 r tc c tc example r/c values (all resistors and capacitors are 5%) (c tc = c tc + 20 pf) f osc (khz) r tc c tc r s r 1 c 1 r 2 c 2 362 181 88.7 42.6 21.5 8.53 1.71 10 k 10 k 10 k 10 k 10 k 10 k 50 k 20 k 20 k 20 k 20 k 20 k 20 k 100 k 120 pf 240 pf 490 pf 1020 pf 2020 pf 5100 pf 5100 pf 10 k 10 k 10 k 10 k 10 k 10 k 50 k 100 k 100 k 100 k 100 k 100 k 200 k 200 k 910 pf 1800 pf 3900 pf 7500 pf 0.015 f 0.02 f 0.1 f 470 pf 910 pf 2000 pf 3900 pf 8200 pf 0.02 f 0.02 f a1 a2 a3 a4 a5 1 2 3 4 5 5 trinary addresses 4-bit binary data v dd v dd v dd te 0.1 f d out r tc r s c tc d6 d7 d8 d9 6 7 9 10 14 15 16 13 12 11 8 v dd 5 trinary addresses mc145026 mc145027 0.1 f repeat of above repeat of above d in r1 c 1 r2 c 2 1 2 3 4 5 15 14 13 12 11 d6 d7 d8 d9 vt 8 10 7 6 9 16 a1 a2 a3 a4 a5
package dimensions freescale semiconductor wireless rf product device data 3-73 mc145026 6 package dimensions figure 19. outline dimensions for p suffix plastic dip (dual in-line package) (case outline 648-08, issue r) figure 20. outline dimensions for d suffix sog (small outline gull-wing) package (case outline 751b-05, issue k) notes: 1. 2. 3. 4. 5. dimensioning and tolerancing per ansi y14.5m, 1982. controlling dimension: inch. dimension l to center of leads when formed parallel. dimension b does not include mold flash. rounded corners optional. -a- b f c s h g d 16 pl j l m seating plane 1 8 9 16 k -t- m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 ? 10 ? 0 ? 10 ? s 0.020 0.040 0.51 1.01 seating plane 0.49 16x b m 0.25 a t 0.35 1.75 1.35 0.25 0.10 6 t 16x 0.1 t 1.27 14x 8 9 116 8 x 6.2 5. 8 m 0.25 b 4 10.0 9. 8 a 4.0 3. 8 b pin 1 index pin's number 5 a a 0.50 x45? 0.25 7? 1.25 0.40 0? 0.25 0.19 section a-a notes: 1. dimensions are in millimeters. 2. dimensioning and tolerancing per asme y14.5m, 1994. 3. datums a and b to be determined at the plane where the bottom of the leads exit the plastic body. 4. this dimension does not include mold flash, protrusion or gate burrs. mold flash, protrusion or gate burrs shall not exceed 0.15mm per side. this dimension is determined at the plane where the bottom of the leads exit the plastic body. 5. this dimension does not include inter-lead flash or protrusions. inter-lead flash and protrusions shall not exceed 0.25mm per side. this dimension is determined at the plane where the bottom of the leads exit the plastic body. 6. this dimension does not include dambar protrusion. allowable dambar protrusion shall not cause the lead width to exceed 0.62mm.
freescale semiconductor 3-74 wireless rf product device data mc145026 package dimensions figure 21. outline dimensions for dw suffix sog (small outline gull-wing) package (case outline 751g-04, issue d) notes: 1. 2. 3. 4. 5. 6. dimensions are in millimeters. dimensioning and tolerancing per asme y14.5m, 1994. datums a and b to be determined at the plane where the bottom of the leads exit the plastic body. this dimension does not include mold flash, protrusion or gate burrs. mold flash, protrusion or gate burrs shall not exceed 0.15mm per side. this dimension is determined at the plane where the bottom of the leads exit the plastic body. this dimension does not include inter-lead flash or protrusions. inter-lead flash and protrusions shall not exceed 0.25mm per side. this dimension is determined at the plane where the bottom of the leads exit the plastic body. this dimension does not include dambar protrusion. allowable dambar protrusion shall not cause the lead width to exceed 0.62mm. seating plane 0.49 16x b m 0.25 a t 0.35 2.65 2.35 0.25 0.10 6 t 16x 0.1 t 1.27 14x 8 9 1 16 8 x 10.55 10.05 m 0.25 b 4 10.45 10.15 a 7.6 7.4 b pin 1 index pin's number 5 a a 0.75 x45 ? 0.25 7? 1.0 0.4 0? 0.32 0.23 section a-a

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